Title :
An efficient design of non-linear CA based PRPG for VLSI circuit testing
Author :
Das, Sukanta ; Dey, Debdas ; Sen, Subhayan ; Sikdar, Biplab K. ; Chaudhuri, P. Pal
Author_Institution :
Comput. Sci. & Technol., Deemed Univ., Howrah, India
Abstract :
We report the efficient design of pseudo-random pattern generator (PRPG) with linear time complexity. The PRPG is developed around the regular structure of nonlinear cellular automata (CA). The application of proposed PRPG is demonstrated in designing on-chip test pattern generator (TPG) for VLSI circuits. The quality of the TPG is as good as that designed with the existing schemes, employing maximal length linear CA incurring O(n3) complexity.
Keywords :
VLSI; automatic test pattern generation; cellular automata; circuit CAD; circuit testing; computational complexity; random number generation; system-on-chip; TPG; VLSI circuit testing; linear time complexity; nonlinear cellular automata; on-chip test pattern generator; pseudo-random pattern generator; Application software; Character generation; Circuit testing; Computer science; Educational institutions; Logic; Polynomials; Vectors; Very large scale integration;
Conference_Titel :
Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia and South Pacific
Print_ISBN :
0-7803-8175-0
DOI :
10.1109/ASPDAC.2004.1337549
