A Novel On-chip Debug System with Quick All-registers Scan Chain Based on JTAG

JTAG defines a serial interface to access test-dedicated logic embedded in integrated circuits. As an extension, a test platform based on JTAG standard can support general verifications and debug functions for SOC. The paper presents an on-chip debug system based on JTAG standard for embedded microprocessors. It provides powerful functions for the system. For example, hardware breakpoints, single step execution mode, monitoring the registers, programming. An all-registers structure is used to support quick all-registers monitoring functions. Moreover, the paper contributes to the research of no-gap transfer of debug functions