Title :
A new timed taylor expansion diagrams method
Author :
Wang, Guan-Jun ; Ma, Guang-Sheng ; Jiao, Jin-Liang ; Feng, Gang
Author_Institution :
Dept. of Comput. Sci. & Technol., Harbin Eng. Univ.
Abstract :
This paper prensents an extension to TEDs with timing information, called timed Taylor expansion diagrams (TTEDs). TTEDs is a direct extension to TEDs with timing information and preserves properties of TEDs. TTEDs is also canonical and allows the symbolic manipulations of algebra functions and Boolean functions with timing information. The experiment results show that TTEDs is effective for logic behavior and timing information factors of RTL design description and circuit
Keywords :
Boolean functions; high level synthesis; symbol manipulation; Boolean functions; RTL design description; algebra functions; symbolic manipulations; timed Taylor expansion diagrams method; timing information; Decision support systems; Taylor series;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
DOI :
10.1109/ICSICT.2006.306541