• DocumentCode
    3473627
  • Title

    A Guiding Function Based Greedy Partitioning Algorithm for Dynamically Reconfigurable Systems

  • Author

    Yu, Hai ; Fan, Xiao-Ya ; Zhang, Sheng-Bing ; Qu, Wen-Xin ; An, Jian-Feng

  • Author_Institution
    Aviation Microelectron. Center, Northwestern Polytech. Univ., Xi´´an
  • fYear
    2006
  • fDate
    2006
  • Firstpage
    2009
  • Lastpage
    2012
  • Abstract
    Hardware/software (hw/sw) partitioning is a critical step in the co-design, it directly affects the system performance largely. Targeting the shortcomings existed in the traditional algorithms, in this paper a guiding function based greedy partitioning algorithm (GFBGPA) is presented. The algorithm especially aims at the parameterized FPGA coprocessors architecture. The guiding function is determined by the criticality, speedup, execution probability and area of the task, which not only improves the hardware resource utilization effectively but also takes care of the task on the critical path at the same time, so the algorithm can get an appropriate optimum solution. In the end, this paper analyses the experiment results
  • Keywords
    field programmable gate arrays; greedy algorithms; hardware-software codesign; logic design; FPGA coprocessors; dynamically reconfigurable systems; field programmable gate array; greedy partitioning algorithm; guiding function; hardware-software partitioning; Computer architecture; Coprocessors; Field programmable gate arrays; Hardware; Heuristic algorithms; Partitioning algorithms; Resource management; Software performance; Software systems; System performance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    1-4244-0160-7
  • Electronic_ISBN
    1-4244-0161-5
  • Type

    conf

  • DOI
    10.1109/ICSICT.2006.306577
  • Filename
    4098608