DocumentCode :
3473911
Title :
Self-correcting FSM Architecture Implementation Based on Convolutional Code
Author :
Li, Ming ; Gu, Jian-Wei ; Cao, Jia-Lin ; Ran, Feng ; Shao, Yong
Author_Institution :
Microelectron. Res. & Dev. Center, Shanghai Univ.
fYear :
2006
fDate :
23-26 Oct. 2006
Firstpage :
2049
Lastpage :
2051
Abstract :
The paper discussed the use of convolutional code to implement single fault tolerant finite state machines (FSMs) in VLSI circuits. In order to correct the fault, the authors propose a novel scheme which can simultaneously detect and correct errors occurred in FSM states. A key decoder behind the checker was designed. The error state was corrected and sent back to the FSM, so that the concurrent error in the current state is detected and corrected. Moreover, the IP core of the fault tolerant module was realized by SMIC 0.25 mum CMOS technology and also simulated its function in FPGA
Keywords :
CMOS digital integrated circuits; VLSI; convolutional codes; error correction; field programmable gate arrays; finite state machines; 0.25 micron; CMOS technology; FPGA; IP core; SMIC technology; VLSI circuits; convolutional code; finite state machines; key decoder; self-correcting FSM architecture; single fault tolerance; Automata; CMOS technology; Circuit faults; Convolutional codes; Decoding; Electrical fault detection; Error correction; Fault detection; Fault tolerance; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
Type :
conf
DOI :
10.1109/ICSICT.2006.306590
Filename :
4098621
Link To Document :
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