Cost-effective Hardware/Software Co-verification Environment and Co-Design Method based on C Prototype

Author

Gao, Gu-Gang ; Shi, Long-xing ; Yang, Jun ; Gu, Ming

Author_Institution

National ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing

fYear

2006

fDate

23-26 Oct. 2006

Firstpage

2061

Lastpage

2063

Abstract

This paper presents a novel C simulation based hardware-software co-verification environment and co-design methodology for computation-intensive applications. For reducing verification time and verifying the design adequately, this paper uses hierarchical verification method. At IP level, we propose C reference model based verification strategy. An example of a low cost MPEG-4 decode SoC is use to illustrate our approach´s validity

Keywords

C language; circuit CAD; formal verification; hardware-software codesign; C prototype; C reference model; C simulation; MPEG-4 decode SoC; design verification; hardware/software co-design; hardware/software co-verification environment; hierarchical verification; system-on-chip; verification time; Computational modeling; Costs; Decoding; Embedded system; Hardware; MPEG 4 Standard; Software prototyping; Space exploration; Systems engineering and theory; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on

Conference_Location

Shanghai

Print_ISBN

1-4244-0160-7

Electronic_ISBN

1-4244-0161-5

Type

conf

DOI

10.1109/ICSICT.2006.306594

Filename

4098625

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3473985