DocumentCode :
3474242
Title :
Hierarchical Block Boundary Element Method for Substrate Resistance Calculation
Author :
Zheng, Lanzhou ; Yu, Wenjian ; Wang, Zeyi
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing
fYear :
2006
fDate :
23-26 Oct. 2006
Firstpage :
2095
Lastpage :
2097
Abstract :
It is important to model the substrate coupling for today´s mixed-signal circuit design. This paper presents the hierarchical block boundary element method (HBBEM) for substrate resistance calculation. HBBEM, which can extract the whole interconnect capacitance matrix with once computation, is applied to the substrate resistance calculation. Experiments show that the proposed method is able to produce results with comparable accuracy, and of higher efficiency than existing methods both in running time and memory usage
Keywords :
boundary-elements methods; hierarchical systems; integrated circuit design; mixed analogue-digital integrated circuits; hierarchical block boundary element method; mixed-signal circuit design; substrate resistance calculation; Boundary element methods; Capacitance; Coupling circuits; Electric potential; Electric resistance; Finite difference methods; Green´s function methods; Integral equations; Integrated circuit noise; Laplace equations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
Type :
conf
DOI :
10.1109/ICSICT.2006.306627
Filename :
4098636
Link To Document :
بازگشت