Title :
A 30–60GHz CMOS sub-harmonic IQ de/modulator for high data-rate communication system applications
Author :
Lin, Wei-Heng ; Chang, Wei-Lun ; Tsai, Jeng-Han ; Huang, Tian-Wei
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
Abstract :
A 30-60 GHz sub-harmonic IQ de/modulator using TSMC CMOS 0.13-mum process is presented in this paper. The IQ de/modulator consists of two FET resistive mixers, a 90deg coupler, and a Wilkinson power divider. The resistive mixer could simultaneously used as a up-converted or a down-converted mixer. Therefore, the measurement of the FET resistive mixer based modulator or demodulator will be done. The die size is 0.78 mm times 0.58 mm. Both IQ demodulator and modulator feature the conversion loss of -16plusmn1 dB and good demodulation and modulation capacity.
Keywords :
CMOS digital integrated circuits; demodulators; modulators; CMOS sub-harmonic IQ de/modulator; FET resistive mixers; TSMC CMOS process; Wilkinson power divider; coupler; frequency 30 GHz to 60 GHz; high data-rate communication system; Amplitude modulation; Baseband; Data engineering; Demodulation; FETs; Impedance matching; OFDM modulation; Power dividers; Quadrature phase shift keying; Radio frequency; CMOS; Demodulator; direct-conversion; modulator; sub-harmonic;
Conference_Titel :
Radio and Wireless Symposium, 2009. RWS '09. IEEE
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-2698-0
Electronic_ISBN :
978-1-4244-2699-7
DOI :
10.1109/RWS.2009.4957388
