ECC Hardware Coprocessors for 8-bit Systems and Power Consumption Considerations

In the group of public key algorithms, elliptic curve cryptosystems (or ECC) are widely considered as the best compromise in terms of speed, memory requirement and security level. Recent researches have stressed the possibility of implementing ECC in low-end systems such as the nodes of a wireless sensor network (WSN). The main constraints for such an application are implementation cost and power consumption. The nodes of a WSN are battery-equipped systems, and battery lifetime is a premium factor. In this paper we propose two novel coprocessor architectures: a 12 Kgate processor able to perform one kP operation (i.e. the ECC primitive) over the finite field GF(2¹⁶³ ) in 17.05 ms, consuming 1.1 mJ of energy, and a 18.5 Kgate coprocessor performing the same operation in 14.68 ms but consuming only 0.66 mJ. Both represent advancement with respect to known literature comparable solutions