Compact Frequency Offset Circuit for Testing IC RF Transceivers

Loopback test occupies a place of choice among the strategies to implement built-in self test in RF front-end wireless transceivers. In this kind of test the stimuli generated by the baseband (BB) processor are injected in the transmitter (Tx) chain and the response is fed back to the receiver (Rx). However the direct loopback test is not feasible if the Tx and the Rx operate at different frequencies as in FDD. In such case the loopback test could be also possible making use of an auxiliary frequency offset circuit. The authors are presenting in this paper a compact circuit to perform the frequency translation between the Tx and the Rx bands required to close the loop. The circuit consists of a quadrature generator built on a ring oscillator schema and a single-sideband passive mixer. Both circuits are designed in CMOS 130 nm technology. Although it should be possible to generate the offset frequency in the BB processor, this alternative is preferable for high frequencies. Therefore, the circuit requires only control signals from the BB processor to determine the offset frequency, the output level and the output impedance. These signals allow adapting the circuit performance to GMS, DCS, PCS or IMT-2000 wireless standards