Title :
Low frequency noise performance of gate-first and replacement metal gate CMOS technologies
Author :
Claeys, Cor ; Lee, Jae W. ; Simoen, Eddy ; Veloso, A. ; Horiguchi, Naoto ; Paraschiv, V.
Author_Institution :
EE Dept., KU Leuven, Leuven, Belgium
Abstract :
Low frequency noise characterization is used to compare the quality and reliability of gate dielectric processed using both gate-first and gate-last or replacement metal gate integration schemes. The influence of different processing treatments will be studied, for both planar and FinFET devices, and the obtained results compared with the LF noise specifications of the International Technology Roadmap for Semiconductors (ITRS).
Keywords :
CMOS integrated circuits; MOSFET; integrated circuit design; integrated circuit noise; integrated circuit reliability; interface states; CMOS technology; FinFET; gate dielectric; gate-first integration; gate-last integration; interface traps; low frequency noise performance; replacement metal gate integration scheme; Annealing; Bismuth; Hafnium; High K dielectric materials; Logic gates; MOSFET; Reliability; gate-first; interface traps; low frequency noise; replacement metal gate;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2013 IEEE International Conference of
Conference_Location :
Hong Kong
DOI :
10.1109/EDSSC.2013.6628031
