A fast frequency acquisition phase-locked loop using phase compensation techniques

In this paper, we propose a phase-locked loop (PLL) using multi-state phase-frequency detector (PFD) with variable gain and the mechanism of phase compensation for the feedback divider with variable divider ratio. Both approaches can efficiently enhance the frequency acquisition speed. The phase compensation mechanism is employed to compensate the detected phase error with the tunable feedback divider ratio. The post-layout simulation results indicate that the frequency acquisition time of the proposed PLL can be reduced about 60% compared with conventional PLLs.