Title :
A Testing Approach for Xilinx FPGA´s CLB
Author :
Ming, Tang ; Guo-ping, Zhang ; Huan-guo, Zhang
Author_Institution :
Sch. of Comput., Wuhan Univ.
Abstract :
There have been some researches of testing CLBs in SRAM-based FPGA in recently years. While no research in existing papers has focused on testing and locating multiple stuck-at faults in CLBs. We propose a testing approach for this multiple faults model and try to reduce the number of test configurations (TCs) and test vectors (TVs). It is certificated that in the proposed testing, the number of TCs for testing XC4000 is fixed to 8, and the number of TCs for locating is 8*(2+AC).
Keywords :
SRAM chips; field programmable gate arrays; integrated circuit testing; SRAM-based FPGA; XC4000; Xilinx FPGA CLB; multiple stuck-at fault location; test configuration; test vector; Boolean functions; Computer architecture; Field programmable gate arrays; Flip-flops; Logic arrays; Logic devices; Logic testing; Multiplexing; Programmable logic arrays; Table lookup;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
DOI :
10.1109/ICSICT.2006.306668
