Title :
Photoluminescence Evaluation of Defects Generated during Temperature Ramp-up Process of SiGe-On-Insulator Virtual Substrate Fabrication
Author :
Dong Wang ; Ii, S. ; Ikeda, Ken-ichi ; Nakashima, Hideharu ; Nakashima, Hideharu
Author_Institution :
Art, Sci. & Technol. Center for Cooperative Res., Kyushu Univ., Fukuoka
Abstract :
Defects generated during the temperature ramping process were evaluated by photoluminescence (PL) for Si/SiGe/Si-on-insulator structure, which is the typical structure for SiGe-on-insulator (SGOI) virtual substrate fabrication using the Ge condensation by dry oxidation. The free exciton peaks were clearly observed for the as grown wafers and decreased with the increase of annealing temperature. Defect-related PL signals at around 0.82, 0.88, 0.95 and 1.0 eV were observed and they also varied according to the annealing temperature and SiGe thickness. The defect-related PL signals were also correlated to dislocation-related defects by transmission electron microscopy (TEM)
Keywords :
Ge-Si alloys; annealing; crystal defects; film condensation; oxidation; photoluminescence; silicon; silicon-on-insulator; substrates; 0.82 eV; 0.88 eV; 0.95 eV; 1 eV; Si-SiGe-Si; SiGe-on-insulator; TEM; annealing temperature; condensation; defect-related PL signals; dislocation-related defects; dry oxidation; free exciton peaks; photoluminescence evaluation; temperature ramp-up process; transmission electron microscopy; virtual substrate fabrication; Epitaxial growth; Excitons; Fabrication; Germanium silicon alloys; Oxidation; Photoluminescence; Silicon germanium; Substrates; Surface treatment; Temperature;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
DOI :
10.1109/ICSICT.2006.306678
