Title :
Concept and extraction method of ESD-critical parameters for function-based layout-level ESD protection circuit design verification
Author :
Zhan, R.Y. ; Feng, H.G. ; Wu, Q. ; Guan, X.K. ; Chen, G. ; Me, H.L. ; Wang, A.Z.
Author_Institution :
Illinois Institute of Technology
Abstract :
On-chip ESD (electrostatic discharging) protection is a challenging IC design problem New CAD tools are essential to ESD protection design prediction and verification at full chip level. This paper reports a novel concept and extraction method of ESD-critical parameters for function-based layout-level ESD protection circuit design verification, which has been used to develop the first intelligent CAD tool of such kind. Design examples in 0.35μm BiCMOS are presented.
Keywords :
BiCMOS integrated circuits; Circuit synthesis; Clamps; Design automation; Electrostatic discharge; Integrated circuit layout; Protection; Radio frequency; Radiofrequency integrated circuits; Stress;
Conference_Titel :
Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia and South Pacific
Conference_Location :
Yohohama, Japan
Print_ISBN :
0-7803-8175-0
DOI :
10.1109/ASPDAC.2004.1337685
