Data retention time of a new composed cell for dynamic random access memory

Demand has been placed on systems that use a dynamic random access memory (DRAM) to not only increase the total capacity and data transfer speed but also reduce the operating and standby currents. Owing to data retention time restrictions, a refresh operation to rewrite data in memory cell capacitor is necessary, and power consumption for a refresh operation increases in proportion to the memory capacity. A new proposed method, partial access mode (PAM) is executed by conversion from 1 cell/bit to 2^N cells/bit to reduce the refresh power consumption and the frequency of disturbance effectively extending the memory cell retention time. Conventional computer systems generate a new low-power mode PAM in which all conventional functions and operations are maintained as a full array access mode. The effect of PAM is expressed as the refresh operation interval which is 2^N × 2^N times longer than that of conventional full array access mode. The extension of refresh operation interval is proved by the data retention time of 2^N cells/bit memory cell.