DocumentCode :
3476283
Title :
Hierarchical modeling and control for re-entrant semiconductor fabrication lines: a mini-fab benchmark
Author :
Tsakalis, Kostas S. ; Flores-Godoy, José- Job ; Rodriguez, Armando A.
Author_Institution :
Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ, USA
fYear :
1997
fDate :
9-12 Sep 1997
Firstpage :
508
Lastpage :
513
Abstract :
This paper addresses the problem of controlling reentrant semiconductor fabrication lines. To focus the presentation, a virtual five-machine six-step mini-fab is used. This mini-fab developed by Intel in collaboration with ASU is intended to contain all of the features which make a real line difficult to control. Industry-like policies are discussed and compared with control-theoretic hierarchical policies
Keywords :
hierarchical systems; industrial control; integrated circuit manufacture; production control; semiconductor process modelling; Intel; control-theoretic hierarchical policies; hierarchical control; hierarchical modeling; mini-fab benchmark; re-entrant semiconductor fabrication lines; virtual five-machine six-step mini-fab; Control systems; Fabrication; Industrial control; Job shop scheduling; Manufacturing industries; Resource management; Robustness; Systems engineering and theory; Throughput; Uncertainty;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Technologies and Factory Automation Proceedings, 1997. ETFA '97., 1997 6th International Conference on
Conference_Location :
Los Angeles, CA
Print_ISBN :
0-7803-4192-9
Type :
conf
DOI :
10.1109/ETFA.1997.616323
Filename :
616323
Link To Document :
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