DocumentCode
3476449
Title
Failure of chip sized packaging (CSP) under coupling fields of electrical current and thermal cycle
Author
Gao, Feng ; Zhu, Q.S. ; Zheng, Kai ; Liu, Z.Q. ; Guo, J.D. ; Zhang, Leiqi ; Shang, J.K.
Author_Institution
Shenyang Nat. Lab. for Mater. Sci., Inst. of Metal Res., Shenyang, China
fYear
2013
fDate
11-14 Aug. 2013
Firstpage
30
Lastpage
33
Abstract
In this work, we investigated the failure behavior of a commercial chip size packaging (CSP) under coupling fields of electrical current and thermal cycles. The failure process was real-time monitored through the response resistance change. Under the coupling condition, the lifetime was much shorter than that in single thermal cycle condition. Instead of the void accumulation mechanism, the excessive Joule heat was considered to be failure mechanism in coupling condition. The high temperature induced rapid dissolution of Cu UBM and overheat led to the melt of the solder.
Keywords
chip scale packaging; failure analysis; metallisation; solders; CSP; Cu; Joule heat; UBM; chip sized packaging; coupling fields; electrical current; failure mechanism; response resistance change; solder joint; thermal cycle; under bump metallization; void accumulation mechanism; Couplings; Electromigration; Loading; Soldering; Temperature measurement; Thermal resistance; Chip Size Packaging; Electromigration; Mechanical-electrical Coupling; Solder joint; Thermal cycle;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Packaging Technology (ICEPT), 2013 14th International Conference on
Conference_Location
Dalian
Type
conf
DOI
10.1109/ICEPT.2013.6756414
Filename
6756414
Link To Document