DocumentCode
347645
Title
Using LSSD to test modules at the board level
Author
Ziaja, Thomas A.
Author_Institution
IBM Corp., Austin, TX, USA
fYear
1999
fDate
1999
Firstpage
163
Lastpage
170
Abstract
Integrated circuit testing makes extensive use of scan designs to achieve very high stuck fault coverage. It is feasible to use these same tests to test modules at the board level with some minor modifications. The result is a much higher confidence in the board test leading to less need for repairing good modules due to simple board manufacturing defects which are extremely hard to detect
Keywords
boundary scan testing; fault diagnosis; integrated circuit design; integrated circuit testing; modules; printed circuit design; printed circuit testing; LSSD; board level; board manufacturing defects; boundary scan; defect detection; high stuck fault coverage; integrated circuit testing; interconnect patterns; internal stuck faults; level sensitive scan design; module testing; scan designs; Assembly; Automatic testing; Circuit faults; Circuit testing; Electronic equipment testing; Integrated circuit interconnections; Integrated circuit manufacture; Integrated circuit testing; Manufacturing processes; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1999. Proceedings. International
Conference_Location
Atlantic City, NJ
ISSN
1089-3539
Print_ISBN
0-7803-5753-1
Type
conf
DOI
10.1109/TEST.1999.805627
Filename
805627
Link To Document