A charge pump with reduced current variation and mismatch in low-voltage low-power PLLs

Author

Jia Yaoyao ; Fang Jian ; Qiao Ming ; Zhou Zekun ; Yang Wentao ; Zhang Bo

Author_Institution

Univ. of Electron. Sci. & Technol. of China, Chengdu, China

fYear

2013

fDate

3-5 June 2013

Firstpage

1

Lastpage

2

Abstract

A charge pump with excellent current matching and negligible current variation characteristics over wide output voltage dynamic range is proposed, which is simulated in the 0.18μm standard CMOS process with the power supply 1.8V. The proposed charge pump circuit improves current matching by applying a high gain operational trans-conductance amplifier. Negligible current variation is achieved by inducing a negative feedback loop to suppress the channel modulation effect. Compared with conventional charge pump circuit, the current mismatch of the proposed charge pump circuit is less than 0.5% within the output voltage dynamic range from 0.2V to 1.7V, and the current variation is reduced to 0.8% over the output voltage dynamic range from 0.32V to 1.7V. Besides, the average power consumption of the proposed charge pump circuit is about 0.48mW making it suitable for low voltage and low power PLLs.

Keywords

CMOS integrated circuits; charge pump circuits; low-power electronics; operational amplifiers; phase locked loops; CMOS process; channel modulation effect; charge pump; current mismatch; high gain operational trans-conductance amplifier; low-voltage low-power PLLs; negative feedback loop; power consumption; reduced current variation; size 0.18 mum; voltage 0.2 V to 1.8 V; Switching circuits; charge pump; current mismatch; current variation; phase offset; reference spur;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2013 IEEE International Conference of

Conference_Location

Hong Kong

Type

conf

DOI

10.1109/EDSSC.2013.6628140

Filename

6628140