DocumentCode :
347671
Title :
High level ATPG is important and is on its way!
Author :
Kapur, Rohit
Author_Institution :
Synopsys Inc., Mountain View, CA, USA
fYear :
1999
fDate :
1999
Firstpage :
1115
Lastpage :
1116
Abstract :
ATPG is about test functionality that leads to test patterns to determine the quality of a chip. Traditionally, this technology has been available at the gate level and this paper describes the need to move higher. High Level is defined as any level in the abstraction chain that is above gates. DRC and DFT technology have already moved to higher levels of abstraction. If necessity is the mother of invention, High Level ATPG is not far behind because the need is there
Keywords :
automatic test pattern generation; design for testability; integrated circuit testing; logic testing; DFT technology; abstraction chain; gate level; high level ATPG; logic testing; test functionality; test patterns; Automatic test pattern generation; Automatic testing; Delay; Design for testability; Design methodology; Electronic design automation and methodology; Power dissipation; Process design; Time to market; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1999. Proceedings. International
Conference_Location :
Atlantic City, NJ
ISSN :
1089-3539
Print_ISBN :
0-7803-5753-1
Type :
conf
DOI :
10.1109/TEST.1999.805850
Filename :
805850
Link To Document :
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