Charge control modeling during transient behavior of PT-IGBT using PSpice macromodel

Author

Raciti, A. ; Torrisi, S. ; Frisina, F. ; Letor, R.

Author_Institution

Dept. of Electr. Electron. & Syst. Eng., Catania Univ., Italy

Volume

2

fYear

1998

fDate

17-22 May 1998

Firstpage

1704

Abstract

A new PSpice model of punch-through (PT) IGBTs is developed to account for the presence of the buffer layer and its influence on the dynamic behavior of the device. The recombination and redistribution of charge in the base region of IGBTs during a transient behavior are modeled and represented by equivalent electric circuits. In particular, the effect of the external voltage (clamping voltage) on the tail current decay is modeled. Besides, phenomena such as the “tail bump” and the variation of the slope in the initial part of the output voltage V_ce during a turn-off transient are modeled. The proposed model is validated by comparing several simulation runs to the experimental traces at different static and dynamic working conditions

Keywords

SPICE; equivalent circuits; insulated gate bipolar transistors; semiconductor device models; transient analysis; PSpice macromodel; buffer layer; charge control modeling; charge recombination; charge redistribution; clamping voltage; dynamic behavior; dynamic working conditions; equivalent electric circuits; external voltage; output voltage; punch-through IGBT; static working conditions; tail bump; tail current decay; transient behavior; turn-off transient; Buffer layers; Circuits; Clamps; Electronic mail; Employee welfare; Insulated gate bipolar transistors; Modeling; SPICE; Tail; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics Specialists Conference, 1998. PESC 98 Record. 29th Annual IEEE

Conference_Location

Fukuoka

ISSN

0275-9306

Print_ISBN

0-7803-4489-8

Type

conf

DOI

10.1109/PESC.1998.703410

Filename

703410