Title :
CASHIER: A Cache Energy Saving Technique for QoS Systems
Author :
Mittal, Sparsh ; Zhao Zhang ; Yanan Cao
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Abstract :
With each CMOS technology generation, leakage energy has been increasing at an exponential rate and hence, managing the energy consumption of large, last-level caches is becoming a critical research issue in modern chip design. Saving cache energy in QoS systems is especially challenging, since, to avoid missing deadlines, a suitable balance needs to be made between energy saving and performance loss. We present CASHIER, a Cache Energy Saving Technique for Quality of Service Systems. Cashier uses dynamic profiling to estimate the memory subsystem energy and execution time of the program under multiple last level cache (LLC) configurations. It then reconfigures LLC to an energy efficient configuration with a view to meet the deadline. In QoS systems, allowed slack may be specified either as percentage of baseline execution time or as absolute slack and Cashier can work for both these cases. The experiments show the effectiveness of Cashier in saving cache energy. For example, for an L2 cache size of 2MB and 5% allowed-slack over baseline, the average saving in memory subsystem energy by using Cashier is 23.6%.
Keywords :
CMOS integrated circuits; cache storage; quality of service; CASHIER; CMOS technology; LLC configurations; QoS systems; cache energy saving; chip design; dynamic profiling; last level cache; leakage energy; quality of service; Benchmark testing; Color; Energy consumption; Image color analysis; Logic gates; Program processors; Quality of service; QoS systems; cache leakage energy saving; last level cache; low power; online profiling;
Conference_Titel :
VLSI Design and 2013 12th International Conference on Embedded Systems (VLSID), 2013 26th International Conference on
Conference_Location :
Pune
Print_ISBN :
978-1-4673-4639-9
DOI :
10.1109/VLSID.2013.160