DocumentCode :
3476819
Title :
Dynamic Cache Tuning for Efficient Memory Based Computing in Multicore Architectures
Author :
Hajimiri, Hadi ; Mishra, P. ; Bhunia, Swarup
Author_Institution :
CISE, Univ. of Florida, Gainesville, FL, USA
fYear :
2013
fDate :
5-10 Jan. 2013
Firstpage :
49
Lastpage :
54
Abstract :
Memory-based computing (MBC) is a promising approach to improve overall system reliability when few functional units are defective or unreliable under process-induced or thermal variations. A major challenge in using MBC for reliability improvement is that it can introduce significant energy and performance overhead. In this paper, we present an efficient dynamic cache reconfiguration and partitioning technique to improve performance and energy efficiency in MBC-enabled reliable multicore systems. We use genetic algorithm to search effectively in a large and complex design space. Experimental results demonstrate that the proposed cache reconfiguration and partitioning approach can significantly improve both performance and energy efficiency for on-demand memory based computing without sacrificing reliability.
Keywords :
cache storage; genetic algorithms; multiprocessing systems; MBC; complex design space; dynamic cache tuning; efficient dynamic cache reconfiguration; efficient memory based computing; energy efficiency; genetic algorithm; multicore architectures; on-demand memory based computing; overall system reliability; partitioning technique; reliability improvement; Benchmark testing; Genetic algorithms; Multicore processing; Reliability; Sociology; Statistics; cache partitioning; cache reconfiguration; memory base computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design and 2013 12th International Conference on Embedded Systems (VLSID), 2013 26th International Conference on
Conference_Location :
Pune
ISSN :
1063-9667
Print_ISBN :
978-1-4673-4639-9
Type :
conf
DOI :
10.1109/VLSID.2013.161
Filename :
6472612
Link To Document :
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