Title :
Area & Power Efficient 3.4Gbps/Channel HDMI Transmitter with Single-Ended Structure
Author :
Gupta, Neeraj ; Bala, P. ; Singh, V.K.
Author_Institution :
STMicroelectron. Pvt. Ltd., Noida, India
Abstract :
The HDMI Transmitter´s output driver capable of datarate 3.4Gbps/channel is designed in 40nm technology using the single-ended structure instead of the conventional Differential Current Mode Logic buffer. There is 40% gain in area because of the proposed structure. The power consumption of the implemented HDMI Transmitter Electrical Physical layer is 80mw@10.2Gbps (3.4Gbps/Ch) as seen on silicon.
Keywords :
multimedia systems; peripheral interfaces; HDMI transmitter electrical physical layer; bit rate 3.4 Gbit/s; channel HDMI transmitter; high-definition multimedia interface; single-ended structure; size 40 nm; CMOS integrated circuits; Logic gates; Periodic structures; Receivers; Threshold voltage; Transistors; Transmitters; CML; Current mode driver; HDMI; Ser Serial Link; Transmitter;
Conference_Titel :
VLSI Design and 2013 12th International Conference on Embedded Systems (VLSID), 2013 26th International Conference on
Conference_Location :
Pune
Print_ISBN :
978-1-4673-4639-9
DOI :
10.1109/VLSID.2013.178
