Title :
A Feed-Forward Equalizer for Capacitively Coupled On-Chip Interconnect
Author :
Naveen, K. ; Dave, Mayank ; Baghini, Maryam Shojaei ; Sharma, D.K.
Author_Institution :
Dept. of Electr. Eng., Indian Inst. Inst. of Technol., Mumbai, India
Abstract :
Repeaterless low swing interconnects are potential candidates for high speed low power signaling over on-chip global wires. Capacitive pre-emphasis at the transmitter has been shown to improve the achievable data rate by increasing the relative power at high frequencies. This paper shows an improved transmitter with a 1-tap feed-forward equalizer in addition to capacitive pre-emphasis. A design method for finding the transmitter design parameters using scrupulously chosen bit vectors is also presented. Post layout simulations show that the proposed link achieves a data rate of 4 Gbps over a 10 mm long M8 line with energy consumption of 313 fJ/bit in 90 nm CMOS technology.
Keywords :
CMOS integrated circuits; equalisers; integrated circuit interconnections; integrated circuit layout; low-power electronics; microprocessor chips; CMOS technology; M8 line; bit rate 4 Gbit/s; bit vectors; capacitive pre-emphasis; capacitively coupled on-chip interconnect; distance 10 mm; energy consumption; feed-forward equalizer; high speed low power signaling; on-chip global wires; post layout simulations; repeaterless low swing interconnects; size 90 nm; transmitter design parameters; Capacitors; Clocks; Equalizers; Noise; Receivers; Resistance; Transmitters; Feed-forward equalizer; capacitively coupled interconnect; current mode signaling;
Conference_Titel :
VLSI Design and 2013 12th International Conference on Embedded Systems (VLSID), 2013 26th International Conference on
Conference_Location :
Pune
Print_ISBN :
978-1-4673-4639-9
DOI :
10.1109/VLSID.2013.190