Title :
On Guaranteeing Capture Safety in At-Speed Scan Testing with Broadcast-Scan-Based Test Compression
Author :
Enokimoto, K. ; Xiaoqing Wen ; Miyase, Kohei ; Jiun-Lang Huang ; Kajihara, Seiji ; Laung-Terng Wang
Author_Institution :
Kyushu Inst. of Technol., Iizuka, Japan
Abstract :
Capture safety has become a major concern in at-speed scan testing since strong power supply noise caused by excessive launch switching activity (LSA) at transition launching in an at-speed test cycle often results in severe timing-failure-induced yield loss. Recently, a basic RM (rescue-&-mask) test generation scheme was proposed for guaranteeing capture safety rather than merely reducing LSA to some extent. This paper extends the basic RM scheme to broadcast-scan-based test compression by uniquely solving two test-compression-induced problems, namely (1) input X-bit insufficiency (i.e., fewer input X-bits are available for LSA reduction due to test compression) and (2) output X-bit impact (i.e., output X-bits may reduce fault coverage due to test response compaction). This leads to the broadcast-RM (broadcast-scan-based rescue-&-mask) test generation scheme. Evaluations on large benchmark circuits and an industrial circuit of about 1M gates clearly demonstrate that this novel scheme can indeed guarantee capture safety in at-speed scan testing with broadcast-scan-based test compression while minimizing its impact on both test quality and test costs.
Keywords :
circuit noise; circuit testing; power supply circuits; at-speed scan testing; at-speed test cycle; broadcast-scan-based test compression; capture safety; launch switching activity; rescue-&-mask test generation; strong power supply noise; test costs; test quality; timing-failure-induced yield loss; transition launching; Automatic test pattern generation; Circuit faults; Lead; Logic gates; Safety; Vectors; at-speed scan testing power supply noise; capture safety; test compression; test generation; test power;
Conference_Titel :
VLSI Design and 2013 12th International Conference on Embedded Systems (VLSID), 2013 26th International Conference on
Conference_Location :
Pune
Print_ISBN :
978-1-4673-4639-9
DOI :
10.1109/VLSID.2013.201