DocumentCode :
3477921
Title :
Assertion-Based Functional Consistency Checking between TLM and RTL Models
Author :
Mingsong Chen ; Mishra, P.
Author_Institution :
Shanghai Key Lab. of Trustworthy Comput., East China Normal Univ., Shanghai, China
fYear :
2013
fDate :
5-10 Jan. 2013
Firstpage :
320
Lastpage :
325
Abstract :
Transaction Level Modeling (TLM) is promising for functional validation at an early stage of System-on-Chip (SoC) design. However, raising the abstraction level brings a major challenge - how to guarantee the functional consistency between TLM specifications and Register Transfer Level (RTL) implementations? This paper proposes an efficient mechanism for functional consistency checking using assertion observability. The experimental results using several industrial designs demonstrate that our method can automatically check the functional consistency between different abstraction levels.
Keywords :
integrated circuit design; integrated circuit modelling; system-on-chip; RTL model; SoC design; TLM model; abstraction level; assertion-based functional consistency checking; industrial designs; register transfer level; system-on-chip; transaction level modeling; Clocks; Data models; Monitoring; System-on-chip; Time domain analysis; Time varying systems; Timing; RTL; TLM; assertion; functional consistency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design and 2013 12th International Conference on Embedded Systems (VLSID), 2013 26th International Conference on
Conference_Location :
Pune
ISSN :
1063-9667
Print_ISBN :
978-1-4673-4639-9
Type :
conf
DOI :
10.1109/VLSID.2013.208
Filename :
6472660
Link To Document :
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