Title :
A 6-bit subranging ADC with single CDAC interpolation
Author :
Hyunui Lee ; Miyahara, Masaya ; Matsuzawa, Akira
Author_Institution :
Dept. of Phys. Electron., Tokyo Inst. of Technol., Tokyo, Japan
Abstract :
In this paper, a 6-bit subranging Analog to Digital Converter (ADC) using a new interpolation method is presented. The proposed interpolation method utilizes one differential input signal and two DC voltages. Therefore, the area of Digital to Analog Converter (DAC) is reduced half in comparison to the previous interpolation which utilizes two differential signals. The ADC is implemented in 90 nm process and achieves total power of 3.3 mW, ENOB of 5.8-bits, FoM of 0.12 pJ/conv. at 500 MS/s in simulation.
Keywords :
analogue-digital conversion; digital-analogue conversion; interpolation; DC voltages; differential input signal; digital to analog converter; power 3.3 mW; single CDAC interpolation; size 90 nm; subranging ADC; subranging analog to digital converter; word length 6 bit; ADC; Subranging; interpolation;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2013 IEEE International Conference of
Conference_Location :
Hong Kong
DOI :
10.1109/EDSSC.2013.6628200
