Title :
A 1.2V 84dB 8mW time-interleaved sample and hold circuit in 90 nm CMOS
Author_Institution :
Circuits & Syst. Group, Delft Univ. of Technol., Delft, Netherlands
Abstract :
This paper reports design, efficiency and measurement results of time interleaved sample and hold circuit based on closed loop switched capacitor technique. The prototype sample and hold with 84 dB dynamic range at 120 MS/s has been fabricated in standard single poly, six metal 90 nm CMOS, consumes only 8 mW at 1.2 V power supply and measures 0.22 mm2.
Keywords :
CMOS integrated circuits; sample and hold circuits; switched capacitor networks; CMOS technique; closed loop switched capacitor technique; power 8 mW; power supply; size 90 nm; time-interleaved sample and hold circuit; voltage 1.2 V; Attenuation; Attenuation measurement; CMOS integrated circuits; CMOS technology; Control systems; Solids; Switching circuits;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2013 IEEE International Conference of
Conference_Location :
Hong Kong
DOI :
10.1109/EDSSC.2013.6628204
