DocumentCode :
347867
Title :
GRASP: an effective constructive technique for VLSI circuit partitioning
Author :
Areibi, S.M.
Author_Institution :
Dept. of Electr. Eng., Ryerson Polytech. Inst., Toronto, Ont., Canada
Volume :
1
fYear :
1999
fDate :
9-12 May 1999
Firstpage :
462
Abstract :
Iterative methods are greedy or local in nature and get easily trapped in local optima. Usually interchange methods fail to converge to optimal solutions unless they initially begin from good starting points. The choice of starting point is a very crucial factor in the performance of the iterative improvement algorithms. GRASP is a random adaptive simple heuristic that intelligently constructs good initial solutions in an efficient manner. Good initial partitions obtained by GRASP allow the iterative improvement method to refine that initial partition quality in a reasonable amount of time, thus reducing the computational time and enhancing the solution quality. Results obtained indicate that on average the cut-size is reduced by 20% and speedups of up to 90% were achieved using the GRASP technique.
Keywords :
VLSI; cellular arrays; integrated circuit layout; iterative methods; logic CAD; logic partitioning; GRASP; VLSI circuit partitioning; computational time; constructive technique; cut-size; initial partitions; initial solutions; iterative improvement algorithms; partition quality; random adaptive simple heuristic; solution quality; speedups; Computational intelligence; Data structures; Integrated circuit interconnections; Iterative algorithms; Iterative methods; Partitioning algorithms; Prototypes; Robustness; Sections; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering, 1999 IEEE Canadian Conference on
Conference_Location :
Edmonton, Alberta, Canada
ISSN :
0840-7789
Print_ISBN :
0-7803-5579-2
Type :
conf
DOI :
10.1109/CCECE.1999.807242
Filename :
807242
Link To Document :
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