Title :
A comprehensive study of three moduli sets for residue arithmetic
Author :
Wang, Wei ; Swamy, M.N.S. ; Ahmad, M.O. ; Wang, Yuke
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Abstract :
One important problem in residue arithmetic is the choice of modulo sets to represent the binary numbers in a certain range. In recent years, several general three-modulo sets have been introduced, and each of them is claimed to have some advantages. In this paper, we carry out a comprehensive study for all these modulo sets from the point of view of the hardware complexity and the speed of their residue-to-binary converters. Based on a performance evaluation of the VLSI implementation in terms of area and delay, we conclude that to represent 8-bit, 16-bit, 32-bit and 64-bit binary numbers, the set of moduli {2/sup n/-1, 2/sup n/, 2/sup n/+1} has the fastest residue-to-binary converter requiring the smallest area. The converter for this moduli set is designed based on the new Chinese remainder theorem of Y. Wang (1998).
Keywords :
VLSI; convertors; delays; digital arithmetic; performance evaluation; 3-modulo sets; Chinese remainder theorem; VLSI implementation; binary number representation; chip area; delay; hardware complexity; performance evaluation; residue arithmetic; residue-to-binary converter speed; Application software; Concurrent computing; Delay; Digital arithmetic; Digital filters; Digital signal processing; Fast Fourier transforms; Hardware; Signal processing; Very large scale integration;
Conference_Titel :
Electrical and Computer Engineering, 1999 IEEE Canadian Conference on
Conference_Location :
Edmonton, Alberta, Canada
Print_ISBN :
0-7803-5579-2
DOI :
10.1109/CCECE.1999.807251
