Digit-serial digit-online addition

Digit-online arithmetic has gained considerable interest during the past two decades for high-speed real-time digital signal processing applications. In this paper, the digit-serial and digit-online arithmetic techniques are combined and applied to the development of a novel approach for the design of general digit-size digit-serial digit-online adder cells. The resulting digit-serial digit-online adder cells require only D single-digit digit-online adders for a corresponding hardware implementation, where D represents the digit size. A Matlab program has been developed for the emulation of the behavior of the proposed digit-serial digit-online addition operations. The correct functionality of these addition operations is confirmed by using Matlab simulations.