DocumentCode :
3478970
Title :
A Low Power Complete Charge-Recycling Bus Architecture for Ultra-High Data Rate Ulsi´s
Author :
Yamauchi, H. ; Akamatsu, H. ; Fujita, T.
Author_Institution :
Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
fYear :
1994
fDate :
9-11 June 1994
Firstpage :
21
Lastpage :
22
Keywords :
Batteries; Capacitance; Capacitors; Clocks; Consumer electronics; Frequency; Graphics; High definition video; Stacking; Ultra large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 1994. Digest of Technical Papers., 1994 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-1918-4
Type :
conf
DOI :
10.1109/VLSIC.1994.586172
Filename :
586172
Link To Document :
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