DocumentCode :
3479172
Title :
Design of an STT-MTJ based true random number generator using digitally controlled probability-locked loop
Author :
Oosawa, Satoshi ; Konishi, Takayuki ; Onizawa, Naoya ; Hanyu, Takahiro
Author_Institution :
Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan
fYear :
2015
fDate :
7-10 June 2015
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a design of a True Random Number Generator (TRNG) using a Spin Transfer Torque Magnetic Tunnel Junction (STT-MTJ) device. Since the probability of the STT-MTJ-based TRNG is locked using a digitally controlled feedback loop, the sensitivity of the feedback gain can be reduced greatly, which eliminates a high-gain amplifier in the feedback loop. It is demonstrated using the circuit simulator (NS-SPICE where the STT-MTJ model is established based on 90nm CMOS/MTJ process technologies) and MATLAB that the random sequences generated from the TRNG become 50%, where the gain of signal converters in the probability-locked loop is the precision of at most 9bit.
Keywords :
CMOS integrated circuits; circuit simulation; digital phase locked loops; magnetic tunnelling; random number generation; random sequences; CMOS-MTJ process technology; MATLAB; NS-SPICE circuit simulator; STT-MTJ; TRNG; digitally controlled feedback loop; digitally controlled probability locked loop; feedback gain; random sequences; signal converters; size 90 nm; spin transfer torque magnetic tunnel junction; true random number generator; CMOS integrated circuits; Generators; Junctions; Magnetic tunneling; Resistance; Security; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2015 IEEE 13th International
Conference_Location :
Grenoble
Type :
conf
DOI :
10.1109/NEWCAS.2015.7182089
Filename :
7182089
Link To Document :
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