DocumentCode :
3479275
Title :
Half-Swing Clocking Scheme for 75% Power Saving in Clocking Circuitry
Author :
Hirotsugu Kojima ; Satoshi Tanaka ; Katsuro Sasaki
Author_Institution :
Hitachi Ltd., Central Research Laboratory
fYear :
1994
fDate :
9-11 June 1994
Firstpage :
23
Lastpage :
24
Keywords :
Clocks; Degradation; Delay; Driver circuits; Energy consumption; Frequency; Large scale integration; Latches; Random access memory; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 1994. Digest of Technical Papers., 1994 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-1918-4
Type :
conf
DOI :
10.1109/VLSIC.1994.586193
Filename :
586193
Link To Document :
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