Title :
Wafer Level Packages (WLPs) using Pre-Applied Anisotropic Conductive Films (ACFs)
Author :
Paik, Kyung-Wook ; Son, Ho-Young ; Chung, Chang-Kyu
Author_Institution :
Korea Adv. Inst. of Sci. & Technol., Deajeon
fDate :
Jan. 16 2007-Yearly 18 2007
Abstract :
Wafer level package (WLP) is one of the promising packaging technologies due to its advantages such as fewer processing steps, lower cost, and enhanced device performance compared to conventional single chip packaging. Many reports on new WLP design, material and process have been accomplished according to performance and reliability requirement of the devices to be packaged. For, anisotropic conductive films (ACFs) flip chip assembly has been widely used for flat panel display (FPD) and general semiconductor packaging applications because of lower cost, higher performance and environmentally green packaging process. However, there has been no previous attempt on the wafer level flip chip assembly using ACFs. In this study, wafer level flip chip packages using pre-applied ACFs (denoted as ACF-WLPs) were investigated. After ACF pre-lamination on an electroplated Au bumped wafer, and subsequent singulation, and singulated chips were flip-chip assembled on an organic substrate using a thermo-compression bonding method. Au plated bumps were well assembled on Ni/Au pads of organic substrates. The electrical, mechanical properties and the reliabilities of ACF-WLPs were evaluated and compared with conventional ACF flip chip assemblies using thermo-compression method. Contact resistance measurement was performed after under thermal cycling, high temperature/humidity, and pressure cooker test. ACF joints between electroplated Au bumps and substrate metal pads showed stable contact resistance of 5 m per a bump, strong bump adhesion, and similar reliability behaviors compared with conventional ACF flip chip joints using a thermo-compression bonding. As a summary, new ACF-WLPs were successfully demonstrated for flip chip assembly, and ACF-WLPs can be widely used for many flip chip assembly appliations such as COB (chip-on-board), COF (chip-on-flex) and COG (chip-on-glass).
Keywords :
contact resistance; electroplating; flip-chip devices; semiconductor device packaging; tape automated bonding; wafer level packaging; contact resistance measurement; electroplated bumped wafer; flat panel display; flip chip assembly; preapplied anisotropic conductive films; semiconductor packaging applications; thermal cycling; thermocompression bonding method; wafer level packages; Anisotropic conductive films; Assembly; Contact resistance; Costs; Flip chip; Gold; Process design; Semiconductor device packaging; Substrates; Wafer scale integration;
Conference_Titel :
Polymers and Adhesives in Microelectronics and Photonics, 2007. Polytronic 2007. 6th International Conference on
Conference_Location :
Odaiba, Tokyo
Print_ISBN :
978-1-4244-1186-3
Electronic_ISBN :
978-1-4244-1186-3
DOI :
10.1109/POLYTR.2007.4339158