An Over-Erasure Detection Technique for Tightening Vth Distribution for Low Voltage Operation Nor Type Flash Memory

Author

Miyawaki, Y. ; Nakayama, T. ; Mihara, M. ; Kawai, S. ; Ohkawa, M. ; Ajika, N. ; Hatanaka, M. ; Terada, Y. ; Yoshihara, T.

Author_Institution

ULSI laboratory, Mitsubishi Electric Corporation, Itami, Japan

fYear

1994

fDate

9-11 June 1994

Firstpage

Lastpage

Keywords

Boosting; Circuits; Equations; Flash memory; Fluctuations; Laboratories; Low voltage; Manufacturing processes; Nonvolatile memory; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1994. Digest of Technical Papers., 1994 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-1918-4

Type

DOI

10.1109/VLSIC.1994.586216

Filename

586216

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