DocumentCode
3480153
Title
Third-Generation Architecture Boosts Speed And Density Of Field-Programmable Gate Arrays
Author
Alfke, Peter
Author_Institution
Xilinx, Inc.
fYear
1991
fDate
16-18 April 1991
Firstpage
340
Lastpage
345
Keywords
Boolean functions; Clocks; Field programmable gate arrays; Logic arrays; Logic devices; Logic functions; Logic programming; Programmable logic arrays; Routing; Signal generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Electro International, 1991
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ELECTR.1991.718233
Filename
718233
Link To Document