DocumentCode :
348091
Title :
An even wiring approach to the ball grid array package routing
Author :
Chen, Shuenn-Shi ; Chen, Jong-Jang ; Tsai, Chia-Chun ; Chen, Sao-Jie
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
1999
fDate :
1999
Firstpage :
303
Lastpage :
306
Abstract :
An even-wiring router for the BGA package is presented to interconnect each I/O pad of a chip to a corresponding ball distributed on the substrate area. The major phases for the router consist of layer assignment, topological routing, and physical routing. Using this router, we can generate an even distribution of planar and any-angle wires to improve manufacturing yield. We have also conducted various testing examples to verify the efficiency of this router. Experiments show that the router produces very good results, far better than the manual design, thus it can be practically applied to VLSI packaging
Keywords :
ball grid arrays; circuit CAD; integrated circuit design; microprocessor chips; network routing; BGA package; I/O pad; VLSI packaging; any-angle wires; ball grid array package routing; even distribution; even wiring approach; even-wiring router; layer assignment; manual design; manufacturing yield; physical routing; substrate area; testing examples; topological routing; Clocks; Electronics packaging; Hip; Integrated circuit interconnections; Integrated circuit packaging; Process design; Routing; Testing; Very large scale integration; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design, 1999. (ICCD '99) International Conference on
Conference_Location :
Austin, TX
ISSN :
1063-6404
Print_ISBN :
0-7695-0406-X
Type :
conf
DOI :
10.1109/ICCD.1999.808555
Filename :
808555
Link To Document :
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