DocumentCode :
3481196
Title :
Influence of geometry of microbump interconnects on thermal stress and fatigue life of interconnects in copper filled through silicon via structure
Author :
Hong-Bo Qin ; Hui-Hui Yuwen ; Min-Bo Zhou ; Xin-Ping Zhang
Author_Institution :
Sch. of Mater. Sci. & Eng., South China Univ. of Technol., Guangzhou, China
fYear :
2013
fDate :
11-14 Aug. 2013
Firstpage :
1019
Lastpage :
1024
Abstract :
Through silicon via (TSV) is an emerging technology enabling three dimensional (3D) packaging through vertical interconnection between multiple chips, which can significantly increase I/O per unit area, reduce electrical resistance as well as RC delay, and miniaturize the solder interconnects. However, it can also dramatically increase the current density and thermal energy density in each interconnect meanwhile. Thus, the reliability of miniaturized interconnects should be paid more attention. In this study, the influence of geometry of microbump interconnects, in terms of standoff height (h) and contact angle (θ), on thermal stress and fatigue life of interconnects in TSV structures under thermal cycling loading conditions was investigated by finite element (FE) method. Simulation results show that high thermal stress (herein, the equivalent stress) zones locate at Cu/Si interfaces and microbump interconnects. Considering that interconnects are the weakest part in the packaging system, their thermal stress and thermal fatigue behaviors were further investigated, and results reveal that the microbump interconnects in the lower microbump interconnect array are more vulnerable compared with that in upper arrays, and the outmost microbump interconnects in each interconnect array are most dangerous during the thermal cycling load. Furthermore, the influences of both h and θ on the fatigue life of the dangerous microbumps were calculated by using the modified Darveaux´s energy based method. Calculation results reveal that increasing decreasing h and increasing θ improve the fatigue life of microbump interconnects. Besides, the thermal stress has no necessary connection with fatigue life, whereas the thermal strain (which is influenced by the thermal stress, structure factors and triaxial stress state) is closely related to the plastic strain energy and should be taken into account in evaluation of fatigue life of solder microbump interconnects - n TSV structures.
Keywords :
contact angle; current density; fatigue; integrated circuit interconnections; integrated circuit reliability; microprocessor chips; thermal stresses; three-dimensional integrated circuits; Cu; Cu-Si interfaces; Darveaux energy; RC delay; Si; contact angle; copper filled structure; current density; fatigue life; finite element method; microbump interconnects; multiple chips; packaging system; reliability; solder interconnects; structure factors; thermal cycling; thermal energy density; thermal fatigue; thermal strain; thermal stress; three dimensional packaging; through silicon via structure; triaxial stress state; vertical interconnection; Electronic packaging thermal management; Fatigue; Packaging; Plastics; Strain; Stress; Thermal stresses; 3D packaging; TSV; fatigue life; finite element simulation; microbump interconnect;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Packaging Technology (ICEPT), 2013 14th International Conference on
Conference_Location :
Dalian
Type :
conf
DOI :
10.1109/ICEPT.2013.6756632
Filename :
6756632
Link To Document :
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