• DocumentCode
    3481242
  • Title

    Reliability of RDL structured wafer level packages

  • Author

    Jia Xi ; Donglun Yang ; Lin Bai ; Xinduo Zhai ; Fei Xiao ; Hongyan Guo ; Li Zhang ; Chi Ming Lai

  • Author_Institution
    Dept. of Mater. Sci., Fudan Univ., Shanghai, China
  • fYear
    2013
  • fDate
    11-14 Aug. 2013
  • Firstpage
    1029
  • Lastpage
    1032
  • Abstract
    Wafer level chip scale packaging (WLCSP) is one of the most promising single chip packaging technologies due to advantages of fewer processing steps, lower cost, and enhanced device performance. Moreover, the redistribution layer (RDL) technology is an effective way to improve I/O density of IC packages. However, the reliability of WLP devices with RDL structure is greatly challenged as the pitch size going down. The RDL structure may affect the thermomechanical performance of the solder joints or silicon chips, thus causing unexpected failure. In this paper, RDL structured WLCSPs with pitch size of 500 μm were fabricated. The components with a size of 6×6 mm2 were flip-chip bonded on FR-4 boards. Board level reliabilities of the WLCSP were evaluated by thermal shock test according to JEDEC standard. Furthermore, failure analysis was carried out to find out the failure mechanism and the failure related to the RDL structure was observed. The effect of RDL structure on the reliability of WLP was analyzed with the finite element simulations.
  • Keywords
    chip scale packaging; failure analysis; finite element analysis; integrated circuit interconnections; integrated circuit reliability; thermal shock; wafer level packaging; FR-4 boards; I-O density; IC packages; JEDEC standard; RDL technology; WLCSP; WLP device reliability; board level reliabilities; failure analysis; failure mechanism; finite element simulations; flip-chip bond; pitch size; redistribution layer technology; silicon chips; single chip packaging technologies; size 500 mum; solder joints; thermal shock test; thermomechanical performance; wafer level chip scale packaging; Copper; Electric shock; Electronics packaging; Failure analysis; Semiconductor device reliability; Stress; WLCSP; redistribution; reliability; thermal shock;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Packaging Technology (ICEPT), 2013 14th International Conference on
  • Conference_Location
    Dalian
  • Type

    conf

  • DOI
    10.1109/ICEPT.2013.6756634
  • Filename
    6756634