DocumentCode :
348237
Title :
A clustering- and probability-based approach for time-multiplexed FPGA partitioning
Author :
Chao, M.C.-T. ; Guang-Ming Wu ; Jiang, I.-H.-R. ; Yao-Wen Chang
Author_Institution :
Dept. of Comput. & Inf. Sci., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
1999
fDate :
7-11 Nov. 1999
Firstpage :
364
Lastpage :
368
Abstract :
Improving logic density by time-sharing, time-multiplexed FPGAs (TMFPGAs) has become an important research topic for reconfigurable computing. Due to the precedence and capacity constraints in TMFPGAs, the clustering and partitioning problems for TMFPGAs are different from the traditional ones. We propose a two-phase hierarchical approach to solve the partitioning problem for TMFPGAs. With the precedence and capacity considerations for both phases, the first phase clusters nodes to reduce the problem size, and the second phase applies a probability-based iterative improvement approach to minimize cut cost. Experimental results based on the Xilinx TMFPGA architecture show that our algorithm significantly outperforms previous works.
Keywords :
field programmable gate arrays; logic CAD; logic partitioning; probability; reconfigurable architectures; Xilinx TMFPGA architecture; clustering approach; iterative improvement approach; logic density; probability; reconfigurable computing; time-multiplexed FPGA partitioning; time-sharing FPGA; two-phase hierarchical approach; Clustering algorithms; Computer architecture; Field programmable gate arrays; Iterative algorithms; Logic devices; Partitioning algorithms; Random access memory; Reconfigurable logic; Registers; Time sharing computer systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1999. Digest of Technical Papers. 1999 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
ISSN :
1092-3152
Print_ISBN :
0-7803-5832-5
Type :
conf
DOI :
10.1109/ICCAD.1999.810676
Filename :
810676
Link To Document :
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