Title :
130 nm-technology, 0.25 μm2, 1T1C FRAM cell for SoC (system-on-a-chip)-friendly applications
Author :
Hong, Y.K. ; Jung, D.J. ; Kang, S.K. ; Kim, H.S. ; Jung, J.Y. ; Koh, H.K. ; Park, J.H. ; Choi, D.Y. ; Kim, S.E. ; Ann, W.S. ; Kang, Y.M. ; Kim, H.H. ; Kim, J.-H. ; Jung, W.U. ; Lee, E.S. ; Lee, S.Y. ; Jeong, H.S. ; Kim, Kinam
Author_Institution :
Samsung Electron. Co. Ltd., Yongin
Abstract :
We have successfully demonstrated a world smallest 0.25 μm2 cell ITIC 64 Mb FRAM at a 130 nm technology node. This small cell size was achieved by scaling down a capacitor stack, using the following technologies: a robust glue layer onto the bottom electrode of a cell capacitor; 2-D MOCVD PZT technology, novel capacitor-etching technology; and a top-electrode-contact-free (TEC-free) scheme. The new FRAM cell is suitable for a mobile SoC (System-on-a-Chip) application. This is due to realization of four metal technology required for high-speed logic devices. As a result, the remanent polarization value of 32 μC/Cm2 was achieved after full integration and the sensing window was evaluated to 370 mV at 85degC, 1.3 V.
Keywords :
MOCVD; capacitor storage; electrodes; etching; piezoelectric materials; polarisation; random-access storage; system-on-chip; 1T1C FRAM cell; MOCVD PZT technology; SoC; capacitor stack; capacitor-etching technology;; electrode; high-speed logic devices; system-on-a-chip; top-electrode-contact-free scheme; Capacitors; Electrodes; Ferroelectric films; Logic devices; MOCVD; Nonvolatile memory; Polarization; Random access memory; Robustness; System-on-a-chip; FRAM; PZT; TEC-free;
Conference_Titel :
VLSI Technology, 2007 IEEE Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-900784-03-1
DOI :
10.1109/VLSIT.2007.4339704
