DocumentCode :
3484948
Title :
Ant colony optimization based scheduling for a semiconductor wafer fabrication facility with bottleneck stations
Author :
Li, Li ; Qiao, Fei ; Tian, Xiaoyu ; Wu, Qidi
Author_Institution :
Sch. of Electron. & Inf. Eng., Tongji Univ., Shanghai, China
fYear :
2009
fDate :
5-7 Aug. 2009
Firstpage :
520
Lastpage :
525
Abstract :
In this paper, it is firstly noted that the scheduling of a semiconductor wafer fabrication facility (fab) has its special complexities, such as large scale, a mixed of different processing types, unbalanced production facilities, short-term efficient scheduling period, non-zero state at the decision point time, etc. Secondly, the scheduling model for a wafer fab, composed of a machine set, a task set, a processing time set and the optimized objective function focused on the movements and delivery performance of the jobs, is built with fully consideration on its characteristics. Thirdly, an ant colony optimization based scheduling algorithm (abbreviated as LSA-WF) is proposed. The main idea of LSA-WF is the scheduling of the bottleneck machines of a wafer fab is considered first and foremost, the scheduling of the batch processing machines with recipe constraint is in the next place, the scheduling of machines by wafer or by lot is the third, and the scheduling for the batch processing machines without recipe constraint is the last. The same type of machines is ranked by their workloads in the descending order. Then the simulations on a real wafer fab are used to verify and validate the proposed method. The simulation results show that the proposed method is superior to the common rules (such as FIFO, EDD, SRPT and CR) with more movements of the jobs and higher machine utilities. Finally, the summarization of the research results is given.
Keywords :
optimisation; production facilities; scheduling; semiconductor industry; ant colony optimization; batch processing machines; bottleneck machines; bottleneck stations; delivery performance; movements; nonzero state; optimized objective function; scheduling algorithm; semiconductor wafer fabrication facility; Analytical models; Ant colony optimization; Fabrication; Job shop scheduling; Large-scale systems; Manufacturing processes; Production; Semiconductor device modeling; Simulated annealing; Stochastic processes; ACO; Bottleneck station; Scheduling; Semiconductor manufacturing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Automation and Logistics, 2009. ICAL '09. IEEE International Conference on
Conference_Location :
Shenyang
Print_ISBN :
978-1-4244-4794-7
Electronic_ISBN :
978-1-4244-4795-4
Type :
conf
DOI :
10.1109/ICAL.2009.5262868
Filename :
5262868
Link To Document :
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