DocumentCode
3485618
Title
An Integrated Phase Change Memory Cell With Ge Nanowire Diode For Cross-Point Memory
Author
Zhang, Yuan ; Kim, SangBum ; McVittie, Jim P. ; Jagannathan, Hemanth ; Ratchford, Josh B. ; Chidsey, Christopher E.D. ; Nishi, Yoshio ; Wong, H. S Philip
Author_Institution
Stanford Univ., Stanford
fYear
2007
fDate
12-14 June 2007
Firstpage
98
Lastpage
99
Abstract
We demonstrate a novel phase change memory cell utilizing doped Ge nanowire pn-junction diode both as a bottom electrode and a memory cell selection device. This memory cell can be used for a cross-point memory array with diode selection. Using selective growth of isolated vertical nanowires in each cell, we have minimized the contact area below the lithography limit. A very low SET programming current of 10´s of muA was achieved. RESET/SET resistance ratio of 100x was obtained. The diode provides 100x isolation between forward and reverse bias in the SET state.
Keywords
elemental semiconductors; germanium; integrated memory circuits; nanowires; phase change materials; semiconductor diodes; Ge; RESET/SET resistance ratio; SET programming; cross-point memory; integrated phase change memory cell; memory cell; nanowire diode; pn-junction; Chemical vapor deposition; Diodes; Electrodes; Gold; Leakage current; Lithography; Phase change materials; Phase change memory; Substrates; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2007 IEEE Symposium on
Conference_Location
Kyoto
Print_ISBN
978-4-900784-03-1
Type
conf
DOI
10.1109/VLSIT.2007.4339742
Filename
4339742
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