DocumentCode
3485651
Title
Highly Scalable Phase Change Memory with CVD GeSbTe for Sub 50nm Generation
Author
Lee, J.I. ; Park, H. ; Cho, S.L. ; Park, Y.L. ; Bae, B.J. ; Park, J.H. ; Park, J.S. ; An, H.G. ; Bae, J.S. ; Ahn, D.H. ; Kim, Y.T. ; Horii, H. ; Song, S.A. ; Shin, J.C. ; Park, S.O. ; Kim, H.S. ; Chung, U-in ; Moon, J.T. ; Ryu, B.-I.
Author_Institution
Samsung Electron. Co. Ltd., Yongin
fYear
2007
fDate
12-14 June 2007
Firstpage
102
Lastpage
103
Abstract
first present a PRAM with confinement of chemically vapor deposited GeSbTe (CVD GST) within high aspect ratio 50 nm contact for sub 50 nm generation PRAMs. By adopting confined GST, we were able to reduce the reset current below ~260 muA and thermally stable CVD Ge2Sb2Te5 compound having hexagonal phase was uniformly filled in a contact while maintaining constant composition along with 150 nm depth. Our results indicate that the confined cell structure of 50 nm contact is applicable to PRAM device below 50 nm design rule due to small GST size based on small contact and direct top electrode contact, reduced reset current, minimized etch damage, and low thermal disturbance effect.
Keywords
chemical vapour deposition; phase change materials; random-access storage; CVD; PRAM; confined cell structure; phase change memory; Chemical technology; Chemical vapor deposition; Computer aided engineering; Electrodes; Etching; Moon; Phase change memory; Phase change random access memory; Research and development; Scalability; CMP; CVD; GST; PRAM device; confined;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2007 IEEE Symposium on
Conference_Location
Kyoto
Print_ISBN
978-4-900784-03-1
Type
conf
DOI
10.1109/VLSIT.2007.4339744
Filename
4339744
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