• DocumentCode
    3485750
  • Title

    Enhanced Performance of Strained CMOSFETs Using Metallized Source/Drain Extension (M-SDE)

  • Author

    Chen, Hung-Wei ; Ko, Chih-Hsin ; Wang, Tzu-Juei ; Ge, Chung-Hu ; Wu, Kehuey ; Lee, Wen-Chin

  • Author_Institution
    Taiwan Semicond. Manuf. Co., Ltd., Hsinchu
  • fYear
    2007
  • fDate
    12-14 June 2007
  • Firstpage
    118
  • Lastpage
    119
  • Abstract
    We have demonstrated successfully the integration scheme of metallized source/drain extension (M-SDE) with state-of-the-art strained-Si technique. Drain currents of N-FET (Lgate = 40 nm) and P-FET (Lgate = 35 nm) with M-SDE can achieve 1620 muA/mum and 755 muA/mum at |VG-Vt| = |VD| = 1V, respectively. Superior characteristics of junction leakage and source/drain series resistance are also presented. For M-SDE CMOSFETs, the capability of exploiting strain more efficiently is corroborated by the improved stress sensitivity of linear drain current to mechanical stress. M-SDE CMOSFETs exhibit higher stress sensitivity as scaling the gate length.
  • Keywords
    CMOS integrated circuits; metallisation; stress effects; drain currents; enhanced performance; integration scheme; mechanical stress; metallized source/drain extension; strained CMOSFET; stress sensitivity; CMOSFETs; Capacitive sensors; Degradation; Implants; Metallization; Performance gain; Semiconductor device manufacture; Silicides; Stress; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2007 IEEE Symposium on
  • Conference_Location
    Kyoto
  • Print_ISBN
    978-4-900784-03-1
  • Type

    conf

  • DOI
    10.1109/VLSIT.2007.4339750
  • Filename
    4339750