DocumentCode :
3485820
Title :
F.A.S.T. FIR filter synthesis
Author :
Mehler, Ronald W. ; Zhou, Dian
Author_Institution :
Texas Univ., USA
fYear :
2005
fDate :
20-22 March 2005
Firstpage :
320
Lastpage :
325
Abstract :
We present an architectural synthesizer that produces highly optimized designs from system level specifications while requiring little operator effort or knowledge of digital design techniques. With the initial application of the synthesizer limited to digital finite impulse response (FlR) filters, the synthesizer automatically optimizes both the architecture and filter coefficients, giving results competitive with the best efforts of human designers and other high level tools. We also present a near-optimal and eminently practical algorithm for subexpression sharing in hardware multipliers.
Keywords :
FIR filters; network synthesis; FIR filter synthesis; architectural synthesizer; digital design techniques; digital finite impulse response filters; filter architectural synthesis tool; hardware multipliers; highly optimized designs; subexpression sharing; system level specifications; Algorithm design and analysis; Design automation; Design engineering; Design optimization; Digital filters; Finite impulse response filter; Hardware design languages; Matched filters; Signal processing algorithms; Synthesizers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System Theory, 2005. SSST '05. Proceedings of the Thirty-Seventh Southeastern Symposium on
ISSN :
0094-2898
Print_ISBN :
0-7803-8808-9
Type :
conf
DOI :
10.1109/SSST.2005.1460930
Filename :
1460930
Link To Document :
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