DocumentCode :
3485924
Title :
Gate-all-around Twin Silicon nanowire SONOS Memory
Author :
Suk, Sung Dae ; Yeo, Kyoung Hwan ; Cho, Keun Hwi ; Li, Ming ; Yeoh, Yun Young ; Hong, Ki-Ha ; Kim, Sung-Han ; Koh, Young-Ho ; Jung, Sunggon ; Jang, WonJun ; Kim, Dong-Won ; Park, Donggun ; Ryu, Byung-Il
Author_Institution :
Samsung Electron. Co., Yongin
fYear :
2007
fDate :
12-14 June 2007
Firstpage :
142
Lastpage :
143
Abstract :
We have developed gate-all-around (GAA) SONOS with ultra thin twin silicon nanowires for the first time. By using channel hot electron injection (CHEI) and hot hole injection (HHI) mechanisms, program speed of 1 mus at Vd = 2 V, Vg = 6 V and erase speed of 1 ms at Vd = 4.5 V, Vg = -6 V are achieved with 2~3 nm nanowire and 30 nm gate. Nanowire size below 10 nm dependencies on Vth shift (DeltaVth) and the program/erase (P/E) characteristics are investigated. As nanowire diameter (dnw) decreases, faster program speed and larger DeltaVth are observed.
Keywords :
elemental semiconductors; nanowires; semiconductor storage; silicon; channel hot electron injection; gate-all-around twin silicon nanowire SONOS memory; hot hole injection mechanisms; Channel hot electron injection; Hot carriers; Interference; Nanoscale devices; Nonvolatile memory; Photonic band gap; Research and development; SONOS devices; Silicon compounds; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2007 IEEE Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-900784-03-1
Type :
conf
DOI :
10.1109/VLSIT.2007.4339760
Filename :
4339760
Link To Document :
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